Signal
Integrity Analysis
Detailed signal integrity analysis which focuses
on the optimal cost vs. performance tradeoffs with
respect to:
- Termination ¨C values and implementation
- Board/backplane materials
- Trace widths
- Loose vs tight coupling of differential pairs
- Requirement for back drilling
- Board stackup design
- Connector tradeoffs
- Crosstalk Analysis
HSPICE Simulation of Critical Nets
- Serial Links to 10Gbps. Familiar with XAUI,
PCI Express, ATCA, AMC, HyperTransport etc.
- DDR/QDR/SRAM memory interface, CPU buses
- Large library of existing HSPICE models.
PCB Layout Guidelines
- Detailed routing guidelines based on simulation
results.
- Include feature sizes (pad/anti-pad), differential
trace geometry, proper skew matching, crosstalk
guidelines, routing in BGA field etc.
- CAD support during layout.
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